1. Field of the Invention
The present invention generally relates to PWM (Pulse Width Modulation) controllers, and, more specifically, the present invention relates to a PWM controller having over-temperature protection for power converters.
2. Description of the Related Art
FIG. 1 shows a conventional power converter utilizing a controller 60 having over-temperature protection. The power converter comprises a transformer 10, a power transistor 20, a resistor 25, the controller 60, a thermal resistor 36, rectifiers 11 and 21, capacitors 12 and 22, and a secondary feedback circuit 16. The controller 60 has a supply terminal VCC, an output terminal GATE, a sense terminal CS, a feedback terminal FB, a temperature detection terminal RT, and a ground terminal GND. The transformer 10 comprises a primary winding NP, an auxiliary winding NA, and a secondary winding NS. The auxiliary winding NA charges the capacitor 22 via the rectifier 21 to generate a supply voltage VCC for powering the controller 60. The secondary winding NS generates an output voltage VO of the power converter across the capacitor 12 via the rectifier 11. The secondary feedback circuit 16 comprises a resistor 13, a zenor diode 14, and an opto-coupler 15. The resistor 13 is connected between an output of the power converter and a cathode of the zenor diode 14. An input of the opto-coupler 15 is connected to an anode of the zenor diode 14. The secondary feedback circuit 16 receives the output voltage Vo at the output of the power converter to generate a feedback signal VFB. The resistor 25 is connected between a source of the power transistor 20 and a ground reference. As the power transistor 20 is turned on by the output terminal GATE of the controller 60, the resistor 25 will convert a switching current IP flowing through the power transistor 20 into a sense voltage VCS.
The controller 60 comprises an over-temperature protection circuit, an over-current protection circuit, a regulating circuit, and a PWM (Pulse Width Modulation) circuit 30. The over-temperature protection circuit comprises a current source 34, a comparator 33, and a delay circuit 35. The current source 34 is connected to the temperature detection terminal RT of the controller 60 and a negative terminal of the comparator 33. The thermal resistor 36 is connected between the temperature detection terminal RT of the controller 60 and the ground reference. A positive terminal of the comparator 33 is supplied with a threshold voltage VT. An output of the comparator 33 generates an over-temperature signal SOT via the delay circuit 35. The over-current protection circuit comprises a comparator 31 having a positive terminal supplied with a limit voltage VLMT and a negative terminal supplied with the sense voltage VCS. An output of the comparator 31 generates an over-current signal SOC. The regulating circuit comprises a comparator 32 and a resistor 37. A positive terminal of the comparator 32 receives the feedback signal VFB and is pulled high via the resistor 37. A negative terminal of the comparator 32 receives the sense voltage VCS. An output of the comparator 32 generates a regulating signal SRG. The PWM circuit 30 receives the over-current signal SOC, the regulating signal SRG and the over-temperature signal SOT to generate a driving signal VG at the output terminal GATE of the controller 60.
FIG. 2 shows an example of the PWM circuit 30 of the controller 60. The PWM circuit 30 comprises an oscillator 301, an inverter 302, a flip-flop 303, an AND gate 304, NAND gates 305 and 306, a blanking circuit 307, and a buffer 308. An input of the inverter 302 receives an oscillation signal PLS generated by the oscillator 301. An output of the inverter 302 is connected to a clock-input ck of the flip-flop 303 to enable the flip-flop 303. The output of the inverter 302 is also connected to a first input of the AND gate 304. An input D of the flip-flop 303 is supplied with the over-temperature signal SOT. An output Q of the flip-flop 303 is connected to a second input of the AND gate 304. An output of the AND gate 304 generates a switching signal SPWM. The over-current signal SOC and the regulating signal SRG are supplied to inputs of the NAND gate 305. An output of the NAND gate 305 is connected to a first input of the NAND gate 306. The blanking circuit 307 is connected between the output of the AND gate 304 and a second input of the NAND gate 306. An output of the NAND gate 306 is coupled to a reset-input R of the flip-flop 303 to reset the flip-flop 303. The buffer 308 receives the switching signal SPWM for generating the driving signal VG.
To achieve over-temperature protection in conventional controllers, an independent pin is needed. As a result, there is a need to reduce the pin count of the controller without scarifying original functions thereof for cost-saving concerns.